Deterministic firmware simulator for ARM Cortex-M and RISC-V — with hardware-validated parity
https://labwired.com ↗// readme
LabWired Core
Run your firmware on a virtual instance of a real chip, from your terminal, your CI, or your AI coding agent. No board on your desk.
Recorded from docs/assets/demo.tape against a real binary. You
can re-run it. The second half breaks an assertion on purpose, so you can see the gate
fail.
What is LabWired Core?
LabWired Core loads a firmware ELF and executes it against modeled silicon: CPU, buses, peripherals, sensors, displays, and protocol devices. You get UART output, GPIO and bus traces, register state, and a pass/fail exit code.
Runs are deterministic. The same ELF and the same board manifest give the same trace on every machine. That is what makes a simulator run usable as a CI gate.
Supported cores:
- ARM Cortex-M0+, Cortex-M3, Cortex-M4, Cortex-M7, Cortex-M33
- RISC-V
- Xtensa LX6 and LX7 (selected ESP32 paths)
This repository is the engine behind…